As the public have a greater desire for miniature, multi-functional and Green electronic products, the electronic systems for the future have to meet such growing requirements as follows: small size, light weight, high frequency and high-speed operation, low power consumption, high sensitivity, multi-function and low cost. Whilst 3-D packaging, which stands out for advantages of being capable of reducing volume and increasing utilization rate of the substrate material, is a very attractive means that satisfy these requirements.
However, most of the traditional 3-D packaging adopts a stacking technology; this structure allows to directly stack a plurality of bare dies or substrates through bonding so as to realize a metal interconnect structure in the 3-D direction, which therefore allows integration of a system or a certain function in a 3-D structure. This significantly shortens the interconnect distance and in turn improves transmission speed. However, this method is generally complex and is beset with several problems, which looms large on the production yield and product reliability. Besides, vias are usually used in this type of structure to allow connection between layers, but this requires a complex process and is rather difficult to succeed.